
1996 Microchip Technology Inc.
DS30412C-page 125
PIC17C4X
IORWF
Inclusive OR WREG with f
Syntax:
[
label ]
IORWF
f,d
Operands:
0
≤ f ≤ 255
d
∈ [0,1]
Operation:
(WREG) .OR. (f)
→ (dest)
Status Affected:
Z
Encoding:
0000
100d
ffff
Description:
Inclusive OR WREG with register 'f'. If
'd' is 0 the result is placed in WREG. If
'd' is 1 the result is placed back in regis-
ter 'f'.
Words:
1
Cycles:
1
Q Cycle Activity:
Q1
Q2
Q3
Q4
Decode
Read
register 'f'
Execute
Write to
destination
Example:
IORWF
RESULT, 0
Before Instruction
RESULT =
0x13
WREG
=
0x91
After Instruction
RESULT =
0x13
WREG
=
0x93
LCALL
Long Call
Syntax:
[
label ]
LCALL
k
Operands:
0
≤ k ≤ 255
Operation:
PC + 1
→ TOS;
k
→ PCL, (PCLATH) → PCH
Status Affected:
None
Encoding:
1011
0111
kkkk
Description:
LCALL
allows an unconditional subrou-
tine call to anywhere within the 64k pro-
gram memory space.
First, the return address (PC + 1) is
pushed onto the stack. A 16-bit desti-
nation address is then loaded into the
program counter. The lower 8-bits of
the destination address is embedded in
the instruction. The upper 8-bits of PC
is loaded from PC high holding latch,
PCLATH.
Words:
1
Cycles:
2
Q Cycle Activity:
Q1
Q2
Q3
Q4
Decode
Read
literal 'k'
Execute
Write
register PCL
Forced NOP
NOP
Execute
NOP
Example:
MOVLW
HIGH(SUBROUTINE)
MOVPF
WREG, PCLATH
LCALL
LOW(SUBROUTINE)
Before Instruction
SUBROUTINE
=
16-bit Address
PC
=
?
After Instruction
PC
=
Address (SUBROUTINE)